Early-stage team building AI-powered tools for hardware verification and debug.
Founding Silicon Engineer
Your mornings start in a San Francisco lab, booting Python scripts that parse waveforms and hunt race conditions before they become tape-out nightmares. You'll own silicon bring-up infrastructure from day one — writing the debug harnesses that let verification engineers shave weeks off their DV cycles. This is hands-on systems work: think parsing VCDs, building visualization pipelines, and teaching machines to spot the glitches humans miss at 3 a.m.
What they're looking for
- 1.5–6 years of experience in silicon validation, emulation, or hardware debug workflows
- Solid Python fluency; comfortable processing multi-gigabyte waveform and simulation dumps
- Familiarity with SystemVerilog, UVM, or commercial EDA debug environments
- Track record of shipping tools or automation that hardware engineers actually use
- Genuine interest in applying ML/AI approaches to reduce manual debug burden